Introduction
Quick review of computer history: from early calculators to modern computers. How computers are made: microelectronics and semiconductor industry. Electronic Design Automation (EDA). Semiconductor intellectual property (IP). Abstractions hierarchy and modelling approaches for modern microelectronic devices. Typical design flow of digital microelectronic devices. Application-specific integrated circuit (ASIC) and field-­programmable gate array (FPGA). Design quality measures of digital microelectronic devices.

Lab: introduction to FPGA design using Quartus software
Quartus interface fundamentals. Pin assignment. Basic FPGA design flow. The IP catalogue. Using the schematics editor. Implementing a simple counter in FPGA.

From transistors to Boolean circuits
Boolean functions and algebras. Complementary metal oxide semiconductor (CMOS) transistors. Modelling CMOS transistors with Boolean functions. CMOS circuits. Logic gates. Boolean circuits and combinational logic design. Simple combinational circuits.

Seminar: representing Boolean functions
Representing Boolean functions with CMOS circuits. Representing Boolean functions with Boolean circuits: sum-of-products and product-of-sums forms. Logic minimisation with Karnaugh Maps.

Introduction to hardware description languages
The Verilog HDL. Simulation and synthesis. Behavioural and structural representations of hardware. Basic data structures: wire and reg. Modules: ports, declaration and instances. Continuous assignment. Operators that generate combinational circuits. Always and initial blocks. Blocking and non-blocking assignment.

Lab: hardware simulation with ModelSim
Basics of Verilog’s module simulation with ModelSim software. Reading waveforms. Creating simple testbenches with Verilog.

The Verilog HDL continued
Parameterised modules. Module hierarchy. Generate blocks.

Lab: Verilog coding essentials
Creating behavioural descriptions: assign and always statements. Creating structural descriptions: gate-level modelling, creating modules hierarchies. Practice with parameterised modules and generate blocks.

Sequential digital building blocks
Sequential logic: latches and triggers. Timing characteristics of sequential circuits: set-up and hold time, clock period and frequency. Behavioural, gate-level and transistor modelling of basic sequential circuits. Synchronous and asynchronous reset. Synchronous sequential circuits design paradigm.

Lab: designing sequential digital blocks
Designing simple latches and triggers with structural Verilog and implementing them with FPGA.

Verilog coding session.
Presentation of the first week’s project.

Memory
Registers and memory arrays. Read-only memory (ROM) and random-access memory (RAM). External and internal memory. Memory hierarchy in the computer: register file, caches, external memory elements. Stacks.

Lab: designing simple stack calculator
Prototyping single- and dual-port RAM. Creating a simple stack calculator.

Combinational digital building blocks
Logic blocks: multiplexers, demultiplexers, comparators and selectors. Arithmetic blocks: adders, subtractors, shifters and rotators. Combinational circuits for multiplication and integezr division. Building arithmetic-logic unit (ALU). Fixed and floating-point number systems.

Lab: designing simple ALU
Designing logic and arithmetic blocks. Creating a simple ALU. Simulating ALU in ModelSim and prototyping with FPGA.

Hardware implementation of algorithms and data structures
Datapath and control. Reasoning in terms of states and transitions. Selecting blocks for the datapath. Concurrency and parallelism in the datapath. Designing control. Examples.

Lab: implementing algorithm in hardware
Creating FPGA implementation of simple algorithms.

Finite State Machines
Formal definition and semantics of finite state machines (FSMs). Types of FSMs: Moore and Mealy Machines. Representations of FSM: state tables, diagrams and equations, sequential circuits. State encodings. Building sequential circuit from state diagram. Examples.

Lab: Implementing FSMs in hardware
Using behavioural Verilog to model FSM. Implementing simple FSMs with FPGA.

Assembly and machine language
MIPS assembly language. Core MIPS instructions. Type of operands: registers, memory and constants. MIPS machine language. R-type, I-type and J-type instructions. Basics of programming in assembly programming.

Seminar: programming in assembly
Writing simple programmes in MIPS assembly language.

Verilog coding session.
Presentation of the second week’s project.

Microarchitecture
Architectural state and instruction set. Designing single cycle processor. Basic elements of the datapath. Assembling data path to support basic MIPS instructions. Single-cycle control. Performance analysis.

Lab: analyzing a microprocessor
Analyzing the structure of a simple MIPS-based microprocessor, prototyping it with FPGA. Compiling simple programmes to MIPS assembly, translating assembly to machine codes and uploading final instructions to the FPGA prototype.

Microarchitecture continued
Designing multi-cycle processor. Non-architectural state. Modifying datapath for multicycle support. Multi-cycle control. Comparing performance of single and multi-cycle processors.

Lab: analyzing multi-cycle processor
Analysing a MIPS-based multi-cycle processor. Timing analysis of multi cycle processor and comparison with single-cycle processor.

Presentation of the third week’s project.
Final exam.